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Organization

National Taiwan University
Session Chair(s)
Yu-Jie Cai
Yao-Wen Chang
Ming-Hung Chen
Yun-Chih Chen
Yun Chou
Chen-Hao Hsu
Jhih-Wei Hsu
Yang Hsu
Chiao-Shan Jhang
Iris Hui-Ru Jiang
Jie-Hong Roland Jiang
Tei-Wei Kuo
Wan-Hsuan Lin
Yuan-Hung Tsai
Shang-En Tseng
Wei-Hsiang Tseng
Jun-Jie Wang
Chun-Feng Wu
Hung-Yu Yeh
Tz-Ching Yu
He-Teng Zhang
Presentations
Research Manuscript
A Bridge-based Compression Algorithm for Topological Quantum Circuits
Design
Quantum Computing
Hosted in Virtual Platform
Research Manuscript
A Two-Stage Neural Network Classifier for Data Imbalanced Problem with Application to Hotspot Detection
EDA
Physical Design and Verification, Lithography and DFM
Presented In-Person
Research Manuscript
Bit-Slicing the Hilbert Space: Scaling Up Accurate Quantum Circuit Simulation
Design
Quantum Computing
Hosted in Virtual Platform
Research Manuscript
Deep Integration of Circuit Simulator and SAT Solver
EDA
RTL/Logic Level and High-level Synthesis
Hosted in Virtual Platform
Research Manuscript
Performance-Driven Simultaneous Partitioning and Routing for Multi-FPGA Systems
EDA
Physical Design and Verification, Lithography and DFM
Hosted in Virtual Platform
Research Manuscript
RePIM: Joint Exploitation of Activation and Weight Repetition for In-ReRAM DNN Acceleration
Design
AI/ML System Design
Hosted in Virtual Platform
Research Manuscript
Reptail: Cutting Storage Tail Latency with Inherent Redundancy
Embedded Systems
Embedded System Design Methodologies
Hosted in Virtual Platform
Research Manuscript
Simultaneous Pre- and Free-assignment Routing for Multiple Redistribution Layers with Irregular Vias
EDA
Physical Design and Verification, Lithography and DFM
Hosted in Virtual Platform
Research Manuscript
Subresolution Assist Feature Insertion by Variational Adversarial Active Learning and Clustering with Data Point Retrieval
EDA
Physical Design and Verification, Lithography and DFM
Hosted in Virtual Platform
Research Manuscript
VLSI Structure-aware Placement for Convolutional Neural Network Accelerator Units
EDA
Physical Design and Verification, Lithography and DFM
Hosted in Virtual Platform