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Organization

STMicroelectronics
Session Chair(s)
Bastien Aghetti
Ankur Bal
Akshita Bansal
Atul Bhargava
Florian Cacho
Kedar Janardan Dhori
Jean-Arnaud Francois
Honey Garg
Rajnish Garg
Rohit Goel
Rohit Kumar Gupta
Vijay Singh Khati
Monika Lilani
Veny Mahajan
Etienne Maurin
Anand Mishra
Anuradha Ray
Damien Riquet
Rachit Sharma
Rajeev Singh
Rupesh Singh
Pascal Urard
Presentations
Designer, IP and Embedded Systems Track Poster Networking Reception
Accelerating Standard Cells Variation-Aware Characterization Methodology with Machine Learning Techniques
Designer, IP and Embedded Systems Track Poster Networking Reception
Automated Generation of Current Controlled Oscillator (CCO) Layout using Template Reuse Flow
Designer, IP and Embedded Systems Track Poster Networking Reception
Diagnostic Coverage of Memory IP with Fault Injection Simulation using TestMAX CustomFault Simulator
Designer, IP and Embedded Systems Track Poster Networking Reception
Early Layout Area and PLS Estimation by Designers
Designer, IP and Embedded Systems Track Poster Networking Reception
Expediting Data Converter Layouts using Design Planning & Analysis (DPA) Automation
Designer, IP and Embedded Systems Track Poster Networking Reception
High Bandwidth All-Digital Clock and Data Recovery Architecture
Designer, IP and Embedded Systems Track Poster Networking Reception
Innovative In-Situ Slack Monitor (IS2M) Design for Dynamic Detection of Voltage Temperature Ageing Change.
Designer, IP and Embedded Systems Track Poster Networking Reception
Mitigating Variability Challenges of IPs for Robust Design
Designer, IP and Embedded Systems Track Poster Networking Reception
Systematic Generation and Refresh of Standard Cell Abutment Database