CANCELLED: Resolution of Verification bottleneck by Functional Coverage Automation
TimeMonday, December 6th5:00pm - 6:00pm PST
LocationLevel 2 - Exhibit Hall
Event Type
Designer, IP and Embedded Systems Track Poster Networking Reception
Virtual Programs
Presented In-Person
DescriptionThe efforts to randomize and constraints the test cases is based on the developer or verification engineers perception of test vectors required and can easily lead to the hidden bug being overlooked. Traditionally, the coverage goals would have been reached by writing more test cases with unpredictable timelines (particularly keeping time to market guidelines in view). Functional Coverage defines critical states and Constrained Randomization tests those states in unpredictable ways. Often Constrained Randomization necessarily repeats states or worse catastrophically misses the coverage point which has the “hidden” bug since the coverage points are written by the verification engineer by using coverage bins. To meet coverage goals, the verification engineer would need to write more test cases.

This presentation explores the standard Constrained Randomization techniques to attain coverage and uses coverage automation tools, using intelligent routines and algorithms, and analyzes the coverage matrix and does the maximum possible coverage by traversing the paths to detect undetectable bugs to increase functional coverage and applied it to a Zetta-Hz High Speed CDMA transceiver.