Presentation
A Highly Reusable Generic UVM for Soft Processors
TimeTuesday, December 7th5:00pm - 6:00pm PST
LocationLevel 2 - Exhibit Hall
Event Type
Designer, IP and Embedded Systems Track Poster Networking Reception
Presented In-Person
DescriptionBoth the design and the verification processes nowadays are pushing towards reusable environments.
Directed testing is more convenient, but it is hard to hit more complex scenarios. So, Constrained-random verification (CRV) methodologies is more efficient.
In this work, a highly generic and reusable UVM based test bench is proposed to verify the functionality of different processors cores, these cores:
Are based on different instruction set architectures (ISAs).
Have different microarchitectures (pipeline, cache memories).
Directed testing is more convenient, but it is hard to hit more complex scenarios. So, Constrained-random verification (CRV) methodologies is more efficient.
In this work, a highly generic and reusable UVM based test bench is proposed to verify the functionality of different processors cores, these cores:
Are based on different instruction set architectures (ISAs).
Have different microarchitectures (pipeline, cache memories).