A flexible SAR-ADC IP for multiple technodes
TimeTuesday, December 7th4:30pm - 5:30pm PST
LocationDAC Pavilion
Event Type
Designer, IP and Embedded Systems Track Presentations
Virtual Programs
Presented In-Person
DescriptionWe present an novel charge-redistribution SAR-ADC, which is featured by covering sampling rates from 100 Sps up to 2 MSps with high accuracy up to 11 bit ENOB.
We achieve Ultra-low-power consumption down to 2.3 µW @ 10kSps for IoT and medical applications. The SAR-ADC IP is silicon-proven in various technologie nodes from 350nm, 180nm down to 22nm for different foundries. To speed up new mixed-signal product developments we successfully used automated migration to new technologie nodes by using Fraunhofer INTELLIGENT IP technology.