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Presentation

Diagnostic Coverage of Memory IP with Fault Injection Simulation using TestMAX CustomFault Simulator
TimeTuesday, December 7th11:45am - 12:00pm PST
Event Type
Designer, IP and Embedded Systems Track Presentations
Virtual Programs
In-Person Only
Topics
IP
DescriptionMemory area contribution is reaching more than 80% on present day SoCs and hence its contribution at time zero and in-field becomes significant. Automotive SoCs designed for life critical applications must ( based on application) qualify Automotive safety integrity Level (ASIL)-D category as per ISO26262 standard. Rigorous functional safety checks and FMEDA (Failure Modes, Effects and Defect Analysis) is a necessary step to systematically predict the Diagnostic Coverage (DC) of all IPs used in safety critical subsystems. DC is achieved by fault injection simulations of safety block and observing the coverage by safety mechanism.

Fault injection simulation is costly affair for full custom design as SPICE simulation is involved. Traditionally, fault injection required hacking of netlist. As memory netlists are hierarchical with high repeatability, injecting a short-circuit or open-circuit fault on an instance in a sub-circuit block needed lot of effort to avoid injection of multiple faults but inject a single fault as desired. In this paper we have used TestMAX CustomFault to perform SPICE level fault injection simulation. We demonstrate that this tool gives ~10X productivity gain and higher accuracy of DC with respect to the traditional approach.