DescriptionProcess, Voltage, Temperature and aging variations are a primary challenge for digital circuit. To compensate these effects, voltage guard-bands are used which add significant power, performance, area overheads. These variations are either static (process) or dynamic (Voltage, temperature, aging). Embedded monitor and pre-error logic detection along with a compensation mechanism can reduce the effect of variations significantly. This work deals with pre-error detection sequential monitor named In-situ slack monitor. In-situ slack monitor is a promising strategy to measure timing slacks and to provide pre-error warning prior to any timing violation. The fundamental concept and proposed design in 28nm technology is explained along with simulation results.