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Presentation

Late Breaking Results: Heterogeneous Circuit Layout Centerline Extraction for Mask Verification
TimeWednesday, December 8th6:00pm - 7:00pm PST
LocationLevel 2 - Lobby
Event Type
Late Breaking Results Poster
Networking Reception
Virtual Programs
Presented In-Person
In-Person Presenter
DescriptionParasitic inductance estimation and calculation based on the extracted centerline result play an important role in mask verification. This paper formulates the centerline extraction problem as a Voronoi diagram to collect centerline points. We then present a graph-based invalid centerline removal method to generate an initial centerline result. Finally, complexity-driven centerline optimization is proposed to further optimize the centerline while considering the irregular structures and design constraints. Compared with the state-of-the-art commercial 3D-RC parasitic parameter extraction tool RCExplorer, experimental results show that our algorithm achieves a better average precision ratio of 99.8% on centerline extraction while satisfying all design constraints.