F-CAD: A Framework to Explore Hardware Accelerators for Codec Avatar Decoding
TimeWednesday, December 8th2:22pm - 2:52pm PST
Event Type
Research Manuscript
Virtual Programs
Presented In-Person
AI/ML System Design
DescriptionExisting hardware accelerators fail to deliver sufficient performance and efficiency for VR codec avatar decoding with multi-branch DNN inference workloads. To address this problem, we propose F-CAD, an automation framework to explore and deliver optimized architectures for codec avatar decoding given application-specific and hardware resource constraints. Novel technologies include 1) a new accelerator architecture to efficiently handle multi-branch DNNs; 2) a high-dimensional multi-branch design space to enable fine-grained architecture configurations; 3) an effective architecture exploration for picking the optimized hardware design. F-CAD is the first automation tool that supports accelerator design, exploration, and evaluation for codec avatar decoding.