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CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement
Time
Location
Event Type
Research Manuscript
Virtual Programs
Hosted in Virtual Platform
Keywords
Embedded Memory, Storage and Networking
Topics
Embedded Systems
DescriptionIn this paper, we propose an In-situ Charge Detection and Adaptive Data Restoration DRAM (CDAR-DRAM) architecture, which dynamically adjusts the refresh rate and relax restore time to reduce the excessive timing margin for the worst-case temperature and weak cells. A low-cost and robust skewed-inverter-based detector is presented to monitor the charge level of DRAM’s bitline during restoration. Moreover, an adaptive DRAM refresh and restore strategy is proposed. Compared with prior works, experimental results show that the proposed architecture achieves 9.4% improvement in system performance and 14.3% improvement in energy efficiency on average, as well as removes the time-consuming profiling process.