Presentation

DescriptionUntrusted third-party vendors and malicious foundry cause the most common vulnerabilities of intellectual properties. Techniques such as locking at the RTL or gate-level to overcome the vulnerabilities have been proved to be insufficient with the emergence of SAT attack and machine-learning-based attacks. In this paper, we propose a locking framework providing a dynamic solution based on performance constraints- attack resiliency, overheads, and locking key size for ensuring hardware protection. The judicious selection of locking points at the higher abstraction combining with multiple syntheses shows that this approach delivers superior attack resiliency with low overheads compared to conventional locking techniques.