Bitwidth-Optimized Energy-Efficient FFT Design via Scaling Information Propagation
Event Type
Research Manuscript
Virtual Programs
Hosted in Virtual Platform
Embedded System Design Methodologies
Embedded Systems
DescriptionFast Fourier Transform (FFT) is an efficient algorithm widely used in digital signal processing. For VLSI implementation of fixed-point FFT, dynamic range growth (DRG) issue inevitably occurs. However, current methods either waste bitwidth or consume excessive resources when dealing with DRG issue. In this paper, we propose Scaling Information Propagation (SIP) method to alleviate DRG issue, which extracts and reuses the known step's scaling information to improve signal-and-noise ratio (SNR). Results show that VLSI implementation of the proposed SI method achieves 30.72% energy reduction and 30.32% area savings under the 20dB SNR requirements of the studied holographic video compression system.