Vision of Automating the Implementation of Security into Silicon
TimeWednesday, December 8th3:30pm - 4:00pm PST
Special Session (Research Track)
Hosted in Virtual Platform
DARPA Program Manager, Microsystems Technology Office (MTO)
DescriptionAn automated integrated design flow that will allow a range of security mechanisms to be automatically inserted into a design can make it essay to design secure chips. Such a security-aware CAD toolchain especially during high-level IC design and that supports power, area, speed, and security (PASS) trade-offs can enable rapid evaluation of architectural alternatives vis-à-vis the PASS metrics. This talk will present an overview of the important threats and discuss how the DARPA automatic implementation of the secure silicon program is enabling the security-aware CAD toolchains that support PASS trade-offs during high-level IC design.