An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices
TimeTuesday, December 7th6:00pm - 7:00pm PST
LocationLevel 2 - Lobby
DescriptionAn in-memory analog computing (IMAC) architecture is developed realizing both synapses and activation functions within MRAM-based memory arrays. First. IMAC architecture is utilized to realize a single-cycle multilayer perceptron (MLP) achieving orders of magnitude performance improvement compared to the previous mixed-signal and digital implementations. Next, we propose using IMAC as the fully-connected classifier in convolutional neural networks (CNN) to reduce inference energy consumption for deep learning applications in mobile devices. The architecture-level requirements of integrating IMAC co-processor with existing mobile processors is investigated. Simulation results verify energy savings for classic CNN models, which can be also extended to modern architectures.