Novel Static Timing Analysis considering Dynamic Voltage Drop
TimeTuesday, December 7th6:00pm - 7:00pm PST
LocationLevel 2 - Lobby
Event Type
Networking Reception
Work-in-Progress Poster
Virtual Programs
Presented In-Person
DescriptionAs technology scales down, metal resistances have increased, resulting in potentially more voltage drop. Therefore, Dynamic Voltage Drop (DVD) significantly affects performance in recent process technologies. Moreover, transistor density has increased, resulting in higher power density. Thus, power integrity and timing check must be done simultaneously. A novel static timing analysis considering DVD is proposed. It is efficient enough to be applied to all the timing signoff scenarios during timing ECO. It is shown that the proposed method is able to achieve 1.2% Vmin and 5.0% frequency improvements of the 10nm CPU design implemented with Samsung Foundry process.