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Presentation

POSAR: A Flexible Posit Arithmetic Unit for RISC-V
TimeWednesday, December 8th6:00pm - 7:00pm PST
LocationLevel 2 - Lobby
Event Type
Networking Reception
Work-in-Progress Poster
Virtual Programs
Presented In-Person
DescriptionWe present POSAR, a flexible Posit Arithmetic Unit that supports different operand sizes suitable for trading off accuracy for memory and energy savings. POSAR is implemented in Chisel, integrated with Rocket Chip, and evaluated on an Arty A7-100T FPGA. Preliminary results show that POSAR with 16-bit operands achieves the same Top-1 accuracy as IEEE 754 32-bit floating-point on a Cifar-10 CNN, but with a speedup of 18%. In contrast to some related works, we show that 8-bit posit is not suitable to replace 32-bit floating-point due to low accuracy.