Parameter Approximation in CNNs for Improved Inference on FPGA
TimeWednesday, December 8th6:00pm - 7:00pm PST
LocationLevel 2 - Lobby
Event Type
Networking Reception
Work-in-Progress Poster
Virtual Programs
Presented In-Person
DescriptionIncreasing the number of parameters of Convolutional Neural Networks (CNNs) to improve their accuracies causes their computational and memory demands to exceed the computational and storage capacities of mobile embedded devices. Here, we focus on improving the memory demands of CNNs during the inference phase by generating their parameters approximately with a smaller number of auxiliary binary parameters, which significantly decreases off-chip and on-chip memory accesses. This paper details the proposed parameter approximation method and design of an accelerator architecture to support this method on FPGA and evaluates the effectiveness of this approach on different CNN models for CIFAR-10 dataset.