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Presentation

MOVE TO VIRTUAL: NEXA: Cloud Native Platform for Collaborative Hardware Logic Design in Step-wise Refinement Implementation Flows
TimeMonday, December 6th5:00pm - 6:00pm PST
LocationLevel 2 - Exhibit Hall
Event Type
Designer, IP and Embedded Systems Track Poster Networking Reception
Virtual Programs
Presented In-Person
DescriptionWe introduce NEXA, a new cloud-native EDA platform for collaborative hardware logic design and debug. EDA tools and hardware design data co-exist as scalable, on-demand microservices.
NEXA platform web applications leverage these microservices to provide new hardware design experiences like “session-based” design and debug. The platform “data sources” span across the hardware design flow: RTL design, compiled designs, RTL transforms, logic simulation data, physical design data in a concise binary form (DD), and hardware debug dumps. These platform capabilities uniquely complement the step-wise refinement implementation flow for hardware design. Use contexts for NEXA span across functional debug, logic-PD co-debug, and post-silicon hardware debug. Evaluation of the platform on industry-class high-performance microprocessor designs demonstrates the capabilities and efficiency of the platform.