Hidetoshi Onodera received BS, MS and PhD degrees in Electronic Engineering, all from Kyoto University, Kyoto, Japan. He joined the Department of Electronics, Kyoto University, in 1983. He was a Professor in the Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University till March 2021. He is currently a Professor in the Faculty of Informatics, Osaka Gakuin University. His research interests include design technologies for Digital, Analog, and RF LSIs, with particular emphasis on low-power design, design for manufacturability, and design for dependability. Dr. Onodera served as a Program Chair and a General Chair of ICCAD and ASP-DAC. He was a Chairman of SSCS Kansai Chapter, IEEE CASS Kansai Chapter, IEEE Kansai Section, IPSJ SIG-SLDM (System LSI Design Methodology), and IEICE Technical Group on VLSI Design Technologies. He served as an Editor-in-Chief of IEICE Transactions on Electronics and IPSJ Transactions on System LSI Design methodology. He is an IEEE Fellow, an IEICE Fellow, and a Member of Science Council of Japan.
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