Neeraj Kaul is the VP of R&D at Synopsys leading Physical Design R&D team and ICCII product and is a member of Platform R&D team. Neeraj has spent over 20 Years serving EDA industry in the areas of Physical Design and Implementation, Placement, Clock Synthesis, Floorplanning, Simulation, Timing , Optimization and Abstraction. Neeraj holds B.Tech from IIT, Delhi, Ph.D. from Vanderbilt University, both in Electrical Engineering. Neeraj has over 10 journal and conference publications and holds 4 US patents.
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