Vito Giovanni Castellana is a Senior Computer Scientist with Pacific Northwest National Laboratory, High-Performance Computing group, which he joined in 2012. His research interests include design automation and high-level synthesis, parallel programming, big data and graph analytics, and, compiler technologies. Castellana received his MSc (cum laude) in Computer Engineering in 2010, and his Ph.D. in Computer Science and Engineering in 2014, from Politecnico di Milano (Italy).
Special Session (Research Track)
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