Lorenzo Ciampolini received the M.S. in Solid-State Physics from Università di Firenze, Italy, in 1996 and Ph.D. in Microelectronics at the Integrated Systems Lab of the ETH Zürich, Switzerland, in 2001. In 2004, he joined STMicroelectronics where he worked some years calibrating Solid-State diffusion physics models for deep sub-micron device manufacturing and then acted nearly 10 years as interface between technologists and SRAM designers. He is a now a senior designer in the advanced memory team of CEA, Grenoble, France, dealing with methodologies and design-for-yield for both volatile and non-volatile memories.
Designer, IP and Embedded Systems Track Poster Networking Reception