Presenter
Ashish Jaitly
Biography
Ashish Jaitly works in EDA with primary focus on ECO flow development for high processor design in IBM Systems group. He has around 14 years of experience graduating in Electronics & Communication from RGEC institute & have worked in various areas including ECO , Synthesis , DFT, front end simulation, emulation , Memory architecture & Processor design.
Presentations
Designer, IP and Embedded Systems Track Presentations
ECO patch generation & stitching to facilitate concurrent ECOs in High Performance Processor Designs
Back-End Design
In-Person Only