Santanu Kundu received his PhD from Electronics and Electrical Communication Engineering Department from the Indian Institute of Technology, Kharagpur in 2011. His dissertation includes Network-on-Chip architecture design in 2D and 3D environments, performance and cost evaluation, signal integrity in nanometer regime, fault-tolerant schemes, and power-performance-reliability trade-off. Thereafter, he joined as SoC Design Engineer in Broadcom Ltd, Bangalore (formerly, LSI India R&D Pvt. Ltd). During his 7 years stay in Broadcom, his role and responsibility was timing sign-off and low power design sign-off. He joined in Intel Technology India Pvt. Ltd, Bangalore in 2018 where his current role and responsibility is to define methodologies for Machine Learning and Artificial Intelligence applications in structural design space. He is also the co-author of the book “Network-on-Chip Design: The Next Generation of System-on-Chip Integration” which was published by CRC Press, Taylor & Francis Group, US in 2015.
Designer, IP and Embedded Systems Track Presentations
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