Kedar Janardan Dhori received the M.Sc. degree in electronics from the Gujarat University, Ahmedabad, India, in 2000 and M.Tech. degree in Microelectronics from the Panjab University, Chandigarh, India, in 2002. From 2001 to 2002, he was an Engineer Trainee with the Semiconductor Complex Ltd (SCL), Mohali, India. Since 2002, he has been working with STMicroelectronics India Pvt. Ltd as a memory designer. He is currently working as Principal engineer in Memories TRnD division. His area of interest is volatile and non-volatile memory design, statistical aware design, low voltage design, Analog and Mix signal design, Hardware Acceleration for Machine Learning and design for Safety/Security. He holds eight patents and eight publications in various peer reviewed journal and conference.
Designer, IP and Embedded Systems Track Presentations
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