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Presenter

Walter Lau Neto
Biography
Walter Lau received the B.Sc. degree in Computer Engineering from Pontifícia Universidade Católica do Rio Grande do Sul (PUCRS) in 2017, the M.Sc. degree in Microelectronics from Universidade Federal do Rio Grande do Sul (UFRGS) in 2018, both in Porto Alegre, Brazil. He is currently pursuing a Ph.D. in Computer Engineering at the University of Utah.
His research interests include digital circuit design, electronic design automation (EDA), logic synthesis and asynchronous circuits.
Presentations
Research Manuscript
EDA
RTL/Logic Level and High-level Synthesis
Presented In-Person
Special Session (Research Track)
EDA
Machine Learning/AI
Hosted in Virtual Platform