Dr. JH Kim has worked in Samsung Electronics from 2017 after receiving the Ph.D in Electrical Engineering from Seoul National University, Republic of Korea. Currently, he is a senior engineer in Samsung Memory, responsible for static timing analysis and timing signoff in Design Technology team. Since he joined in Samsung, he has contributed the developments of automated Placement and Routing(P&R) methodologies which are combined with custom P&R methodologies especially for memory devices. Now he is interested in all aspects about timing analysis and timing signoff methodologies for memory devices.
Designer, IP and Embedded Systems Track Poster Networking Reception