Bertram Bradley
Bertram Bradley is a Senior Staff Engineer/Tech Manager with Marvell in the Austin ASIC Design Center, performing Physical Design and Clocking for the past 25 years with multiple companies. Bertram has helped taped out over 40 designs from 0.8um to 7nm process nodes over a wide range of design sizes and applications. As a Lead Clocking engineer and Clock Methodology specialist, Bertram has helped develop high speed and other custom clocking solutions in various technology nodes, and is currently working on the Marvell 5nm ASIC offering. Bertram holds a Master of Science in Computer Engineering from Loyola University and a Bachelor’s of Science in Electrical Engineering from Virginia Tech.
Designer, IP and Embedded Systems Track Poster Networking Reception
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