Session
Deep Learn your Yield
Session Chairs
Event TypeResearch Manuscript
Presented In-Person
Physical Design and Verification, Lithography and DFM
EDA
TimeTuesday, December 7th11:30am - 12:00pm PST
Location3016
DescriptionWondering how to improve your manufacturability and yield at sub-5nm? These four papers bring the best of deep learning technologies and creative approaches to transfer learn layout pattern generations, attack data imbalance, insert SRAFs and accelerate dummy fill computation.
Presentations
| 11:30am - 11:52am PST | A Two-Stage Neural Network Classifier for Data Imbalanced Problem with Application to Hotspot Detection |


