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DTSTAMP:20211208T164414Z
LOCATION:3014
DTSTART;TZID=America/Los_Angeles:20211209T162000
DTEND;TZID=America/Los_Angeles:20211209T164000
UID:dac_DAC 2021_sess128_RESEARCH153@linklings.com
SUMMARY:Universal Symmetry Constraint Extraction for Analog and Mixed-Sign
 al Circuits with Graph Neural Networks
DESCRIPTION:Research Manuscript\n\nUniversal Symmetry Constraint Extractio
 n for Analog and Mixed-Signal Circuits with Graph Neural Networks\n\nChen\
 n\nRecent research trends in analog layout synthesis aim for a fully autom
 ated netlist-to-GDSII design flow with minimum human efforts.\nSymmetry ma
 tching between critical building blocks and devices can significantly impa
 ct the overall circuit performance.\nTherefore, providing accurate symmetr
 y constraints for automated layout synthesis tools is crucial to achieving
  high-quality layouts.\nThis paper presents a novel graph-learning-based f
 ramework leveraging unsupervised learning to recognize circuit matching st
 ructures.\nThe proposed framework supports both system-level and device-le
 vel symmetry constraints extraction for various large-scale analog/mixed-s
 ignal systems.\nExperimental results show that our framework outperforms s
 tate-of-the-art symmetry constraint detection algorithms with remarkable a
 ccuracy and runtime improvement.\n\nTopic: EDA\n\nKeyword: Analog Design, 
 Simulation, Verification and Test\n\nVirtual Program: Presented In-Person
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