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DTSTART:19700308T020000
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DTSTAMP:20211208T164414Z
LOCATION:3014
DTSTART;TZID=America/Los_Angeles:20211209T160000
DTEND;TZID=America/Los_Angeles:20211209T162000
UID:dac_DAC 2021_sess128_RESEARCH758@linklings.com
SUMMARY:Prioritized Reinforcement Learning for Analog Circuit Optimization
  With Design Knowledge
DESCRIPTION:Research Manuscript\n\nPrioritized Reinforcement Learning for 
 Analog Circuit Optimization With Design Knowledge\n\nNS\n\nAnalog circuit 
 design relies on time-consuming manual design by experts. The development 
 of RL algorithms draws attention to potential applications in circuit opti
 mization. However, for robust analog circuit design, a rapid search for hi
 gh-quality design-points is more desired than finding a globally optimal a
 gent. In this work, we propose three techniques aiming at faster design po
 int search in a data-efficient manner. In particular, we incorporate desig
 n knowledge into the critic network design; guide the RL training with non
 -uniform sampling prioritizing preferential exploitation and exploration; 
 leverage the trained critic network, and evaluate circuit performance for 
 efficient sampling to get high-quality design-points.\n\nTopic: EDA\n\nKey
 word: Analog Design, Simulation, Verification and Test\n\nVirtual Program:
  Presented In-Person
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