BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20211208T164412Z
LOCATION:3018
DTSTART;TZID=America/Los_Angeles:20211208T153000
DTEND;TZID=America/Los_Angeles:20211208T155000
UID:dac_DAC 2021_sess134_RESEARCH979@linklings.com
SUMMARY:Reversible Gating Architecture for Rare Failure Detection of Analo
 g and Mixed-Signal Circuits
DESCRIPTION:Research Manuscript\n\nReversible Gating Architecture for Rare
  Failure Detection of Analog and Mixed-Signal Circuits\n\nHu\n\nDue to the
  expensive simulation and manufacturing cost in analog and mixed-signal (A
 MS) circuit design, AMS failure detection in high-dimensional variational 
 space is demanding with limited samples. In this work, we propose a revers
 ible gating architecture to identify essential features from datasets and 
 reduce feature dimension for the failure detection. Through reversible res
 idual networks (RevNets) for their restoration ability from output to inpu
 t without loss of information, the proposed gating architecture is incorpo
 rated into Bayesian optimization (BO) framework to reduce the dimensionali
 ty of BO embedding important features. Furthermore, two restoration scheme
 s in the RevNet are explored for efficient dimension reduction.\n\nTopic: 
 EDA\n\nKeyword: Manufacturing Test and Reliability\n\nVirtual Program: Pre
 sented In-Person
END:VEVENT
END:VCALENDAR
