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PRODID:Linklings LLC
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TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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TZOFFSETFROM:-0700
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20211208T164508Z
LOCATION:3020
DTSTART;TZID=America/Los_Angeles:20211209T103000
DTEND;TZID=America/Los_Angeles:20211209T120000
UID:dac_DAC 2021_sess168@linklings.com
SUMMARY:Accelerating EDA Algorithms with GPUs and Machine Learning
DESCRIPTION:Special Session (Research Track)\n\nRecent advancements in GPU
  accelerated computing platforms and machine learning (ML) based optimizat
 ion techniques have led to exciting recent research progress with large sp
 eedups on many EDA algorithms fundamental to semiconductor design flows. I
 n this session, we highlight ongoing research deploying GPUs and ML to mas
 k synthesis, IC design automation, and PCB design at commercial EDA vendor
 s and semiconductor design and manufacturing companies. Research into mask
  synthesis techniques shows the potential for GPUs to accelerate inverse l
 ithography and for running training and inference of ML models for process
  modeling. In PCB layout editing, GPU-accelerated path rendering technique
 s can scale to millions of rendered objects with interactive responsivenes
 s. In IC physical design, GPU-accelerated reinforcement learning for DRC f
 ixing combined with traditional EDA optimization techniques can automate s
 tandard cell layout generation. The combination of GPUs and ML can enable 
 large speedups and automate key EDA tasks previously seen as intractable.\
 n\nAccelerating PCB Layout Editor using modern GPU architecture for comple
 x designs\n\nKhailany, Pan, Bernard, Kryukov\n\nAs the complexity of moder
 n electronics continuously grows, EDA products are getting challenged to k
 eep up with performance. The traditional CPU rendering approach is not goi
 ng to be sufficient to be able to process 10s and 100s of millions of obje
 cts at a reasonable speed. Users are demanding a res...\n\n---------------
 ------\nMask Synthesis in the Era of GPU Computing and Deep Learning\n\nKh
 ailany, Pan, Peng\n\nIn semiconductor high-volume manufacturing (HVM), lit
 hography and etch modeling of the patterning process from photomask to sil
 icon plays a fundamental role. In the past few years, Deep Learning (DL) h
 as been successfully applied to capture the residue error of traditional o
 ptical and etch models, w...\n\n\nTopic: EDA, Machine Learning/AI\n\nVirtu
 al Program: Hosted in Virtual Platform, Presented In-Person
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