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BEGIN:VEVENT
DTSTAMP:20211208T164407Z
LOCATION:2008
DTSTART;TZID=America/Los_Angeles:20211207T134500
DTEND;TZID=America/Los_Angeles:20211207T140000
UID:dac_DAC 2021_sess186_IP118@linklings.com
SUMMARY:Power Management Verification of AMD Radeon RX 5000 and RX 6000 Se
 ries GPUs
DESCRIPTION:Designer, IP and Embedded Systems Track Presentations\n\nPower
  Management Verification of AMD Radeon RX 5000 and RX 6000 Series GPUs\n\n
 Akselrod\n\nThis paper describes in detail Power Management Verification o
 f the [COMPANY] [SoC Name] GPU chip. The first generation of [SoC NAME] wa
 s the first GPU from [COMPANY] to use [HIDDEN]nm technology. [SoC NAME] GP
 U also features the most advanced and complex set of power management feat
 ures used in [COMPANY] GPU chips. The complexity of Power Management featu
 res prompted creation of a novel approach to enable thorough and reliable 
 verification and accelerating its verification cycle. In this paper, we de
 scribe an agent-based Power Management verification concept, developed ver
 ify power features in [SoC NAME], and other GPUs to follow. The paper over
 views power management verification methodology, which balances the demand
  for optimal test coverage of power-management features of SoC Integrated 
 Circuits of growing complexity within a given window of project duration. 
 The proposed approach includes agent-based verification. It also allows &#
 8220;IP-level” simulations of some SoC-level scenarios outside of So
 C environment utilizing the same test-cases.\n\nTopic: IP\n\nVirtual Progr
 am: Presented In-Person
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