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DTSTART:19700308T020000
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20211208T164413Z
LOCATION:Level 2 - Lobby
DTSTART;TZID=America/Los_Angeles:20211208T180000
DTEND;TZID=America/Los_Angeles:20211208T190000
UID:dac_DAC 2021_sess243_WIP162@linklings.com
SUMMARY:Parameter Approximation in CNNs for Improved Inference on FPGA
DESCRIPTION:Networking Reception, Work-in-Progress Poster\n\nParameter App
 roximation in CNNs for Improved Inference on FPGA\n\nAkhlaghi\n\nIncreasin
 g the number of parameters of Convolutional Neural Networks (CNNs) to impr
 ove their accuracies causes their computational and memory demands to exce
 ed the computational and storage capacities of mobile embedded devices. He
 re, we focus on improving the memory demands of CNNs during the inference 
 phase by generating their parameters approximately with a smaller number o
 f auxiliary binary parameters, which significantly decreases off-chip and 
 on-chip memory accesses. This paper details the proposed parameter approxi
 mation method and design of an accelerator architecture to support this me
 thod on FPGA and evaluates the effectiveness of this approach on different
  CNN models for CIFAR-10 dataset.\n\nVirtual Program: Presented In-Person
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