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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20211208T164413Z
LOCATION:Level 2 - Lobby
DTSTART;TZID=America/Los_Angeles:20211208T180000
DTEND;TZID=America/Los_Angeles:20211208T190000
UID:dac_DAC 2021_sess243_WIP203@linklings.com
SUMMARY:Finding Optimal Implementations of Non-native CNOT Gates using SAT
DESCRIPTION:Networking Reception, Work-in-Progress Poster\n\nFinding Optim
 al Implementations of Non-native CNOT Gates using SAT\n\nDrechsler\n\nQuan
 tum computer architectures place restrictions on the availability of quant
 um gates. Thus, a given quantum circuit usually needs to be transformed to
  satisfy these restrictions. Existing transformation approaches tend to in
 duce a significant overhead to enable the realization of CNOT gates that a
 re not natively available.  In this work, we propose a method to find opti
 mal implementations of non-native CNOTs, i.e. using the minimal number of 
 native CNOT and Hadamard gates, by using a Boolean Satisfiability (SAT) fo
 rmulation. As confirmed by experimental results, this approach scales cons
 iderably well and enables us to determine significantly improved realizati
 ons of non-native CNOT gates.\n\nVirtual Program: Presented In-Person
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