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BEGIN:VEVENT
DTSTAMP:20211208T164406Z
LOCATION:Level 2 - Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20211206T170000
DTEND;TZID=America/Los_Angeles:20211206T180000
UID:dac_DAC 2021_sess249_DESPOST108@linklings.com
SUMMARY:Early Layout Area and PLS Estimation by Designers
DESCRIPTION:Designer, IP and Embedded Systems Track Poster Networking Rece
 ption\n\nEarly Layout Area and PLS Estimation by Designers\n\nLongrigg, Sy
 mmons, Clewes, Bhargava\n\nArea estimation of IC layouts has become an imp
 ortant requirement for early design and top-down chip planning tools. The 
 relation of area and aspect ratio is necessary for layout planning. For cu
 stom analog IPs, matching placement and routing is very important in layou
 t\ndesign of high-performance analog circuits. System design complexity is
  growing rapidly. In this paper we propose a solution based on Pulsic’s An
 imatePreview. AnimatePreview gives designer quick, easy and accurate physi
 cal information about their analog circuit while they develop their schema
 tic, so they can make better decisions earlier in their design flow and re
 duce iterations.\n\nVirtual Program: Presented In-Person
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