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BEGIN:VEVENT
DTSTAMP:20211208T164406Z
LOCATION:Level 2 - Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20211206T170000
DTEND;TZID=America/Los_Angeles:20211206T180000
UID:dac_DAC 2021_sess249_des230@linklings.com
SUMMARY:MOVE TO VIRTUAL: NEXA: Cloud Native Platform for Collaborative Har
 dware Logic Design in Step-wise Refinement Implementation Flows
DESCRIPTION:Designer, IP and Embedded Systems Track Poster Networking Rece
 ption\n\nMOVE TO VIRTUAL: NEXA: Cloud Native Platform for Collaborative Ha
 rdware Logic Design in Step-wise Refinement Implementation Flows\n\nJoseph
 , Baddam, Reddy, Pulluru, Joy...\n\nWe introduce NEXA,  a new cloud-native
  EDA platform for collaborative hardware logic design and debug. EDA tools
  and hardware design data co-exist as scalable, on-demand microservices. \
 nNEXA platform web applications leverage these microservices to provide ne
 w hardware design experiences like “session-based” design and 
 debug. The platform “data sources” span across the hardware de
 sign flow: RTL design, compiled designs, RTL transforms, logic simulation 
 data, physical design data in a concise binary form (DD), and hardware deb
 ug dumps. These platform capabilities uniquely complement the step-wise re
 finement implementation flow for hardware design. Use contexts for NEXA sp
 an across functional debug, logic-PD co-debug, and post-silicon hardware d
 ebug. Evaluation of the platform on industry-class high-performance microp
 rocessor designs demonstrates the capabilities and efficiency of the platf
 orm.\n\nVirtual Program: Presented In-Person
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