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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20211208T164406Z
LOCATION:Level 2 - Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20211206T170000
DTEND;TZID=America/Los_Angeles:20211206T180000
UID:dac_DAC 2021_sess249_des240@linklings.com
SUMMARY:Routing layer re-optimization in Physical Synthesis
DESCRIPTION:Designer, IP and Embedded Systems Track Poster Networking Rece
 ption\n\nRouting layer re-optimization in Physical Synthesis\n\nReddy\n\nP
 hysical Synthesis tools typically use heuristic optimization techniques to
  cope with ever increasing design sizes. They also need to deal with optim
 izing multiple objectives such as improving timing, decreasing area/power,
  reducing congestion, and so on. In addition, the accuracy of optimization
  environment varies as we go through the Physical Synthesis flow. All thes
 e factors may lead to sub-optimal thick metal layer assignments and inferi
 or timing QOR on some timing critical nets. We propose a novel routing lay
 er re-optimization technique that attempts to (re)assign thick metal routi
 ng resource with the goal of significantly mitigating routing congestion a
 s well as improving design timing QOR.\nThe proposed technique starts with
  an aggressive layer demotion (during late timing optimization stages) in 
 the routing congested regions even at the expense of timing QOR to provide
  an opportunity to correct/improve layer assignment. The timing QOR recove
 ry/improvement phase follows next, initially with cheaper optimizations to
  reduce the need for precious routing layer resource as well as to correct
  any underlying issues such as sub-optimal locations / weak power levels. 
 Next, we perform a gradual & controlled layer reassignment / buffering in 
 a congestion-aware environment to mitigate congestion increases while impr
 oving timing QOR.\n\nVirtual Program: Presented In-Person
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