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BEGIN:VEVENT
DTSTAMP:20211208T164412Z
LOCATION:Level 2 - Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20211208T170000
DTEND;TZID=America/Los_Angeles:20211208T180000
UID:dac_DAC 2021_sess251_DESPOST151@linklings.com
SUMMARY:Hybrid Emulation Methodology for SSD Design
DESCRIPTION:Designer, IP and Embedded Systems Track Poster Networking Rece
 ption\n\nHybrid Emulation Methodology for SSD Design\n\nLee\n\nAs SSD desi
 gn gets more complicated, faster simulation for HW/FW co-verification is h
 eavily required to improve time-to-market. Hybrid emulation is a viable so
 lution to achieve the requirement by combining a virtual platform with an 
 emulator. In this work, we propose a hybrid emulation methodology consider
 ing the characteristics of SSD design which is application-specific and da
 ta-intensive. For SSD design, heavy communication between virtual platform
  and emulator has a negative impact on the performance of hybrid emulation
 . To minimize the communication overhead, the three-step partitioning meth
 od is newly proposed. The proposed method improves 12X SSD device initiali
 zation time compared to pure emulation.\n\nVirtual Program: Presented In-P
 erson
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