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DTSTART:19700308T020000
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DTSTAMP:20211208T164412Z
LOCATION:Level 2 - Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20211208T170000
DTEND;TZID=America/Los_Angeles:20211208T180000
UID:dac_DAC 2021_sess251_DESPOST172@linklings.com
SUMMARY:Priority Synthesis in Physical Synthesis
DESCRIPTION:Designer, IP and Embedded Systems Track Poster Networking Rece
 ption\n\nPriority Synthesis in Physical Synthesis\n\nReddy\n\nPhysical Syn
 thesis uses estimated relative timing criticality to prioritize critical r
 egions during design timing closure. This also applies to dispensing limit
 ed precious resources available such as lower-vt, wider wires. However, it
  is possible that more-critical regions may be closed easily by logic rede
 sign or more accurate boundary assertions while less-critical regions may 
 not have such options and struggle. Such less-critical regions may need to
  be prioritized higher during Physical Synthesis. This is especially helpf
 ul earlier in the design cycle, to evaluate viability of design timing clo
 sure. Priority Synthesis feature is aimed at addressing this need. \nThis 
 work focuses on significantly enhancing priority infrastructure and improv
 ing timing QOR. Highlights include infrastructure that allows identificati
 on of priority regions along with customization of precious resources earm
 arked exclusively for such regions. In addition, special optimization step
 s that target priority regions have been created. Among other things such 
 steps ”steal” or redirect routing resource from non-priority regions to en
 hance priority regions, when appropriate. Based on early user feedback, th
 e timing in priority regions for a challenging design in the field is almo
 st closed with Priority synthesis feature potentially paving way for cycle
  time reduction. This concept is being currently extended to routing steps
 .\n\nVirtual Program: Presented In-Person
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