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VERSION:2.0
PRODID:Linklings LLC
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TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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TZOFFSETFROM:-0700
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TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
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BEGIN:VEVENT
DTSTAMP:20211208T164408Z
LOCATION:DAC Pavilion
DTSTART;TZID=America/Los_Angeles:20211207T163000
DTEND;TZID=America/Los_Angeles:20211207T173000
UID:dac_DAC 2021_sess261_DESPOST109@linklings.com
SUMMARY:Deep data for faster silicon bring-up, characterization, and quali
 fication with higher confidence
DESCRIPTION:Designer, IP and Embedded Systems Track Presentations\n\nDeep 
 data for faster silicon bring-up, characterization, and qualification with
  higher confidence\n\nDatta, Baruch\n\nThe process of reaching volume prod
 uction entails many challenges and uncertainties, especially as design com
 plexities and process technologies advance. Designers work diligently with
  product engineers to characterize, qualify and validate products, while d
 ealing with pressures of time-to-market, performance competitiveness, and 
 quality and reliability requirements. A shift to deep data is needed to ov
 ercome the limitations of best-known-methods, providing visibility into th
 e parametric health and behavior of ICs at every stage. This presentation 
 will highlight how advanced analytics based on chip telemetry allows for a
 dvanced post-to-pre silicon correlation, enhanced reliability validation, 
 performance correlation of ATE and application/system testing, and safe an
 d accurate limit-setting for volume manufacturing. Chip manufacturers gain
  accelerated product bring-up at greater levels of certainty.\n\nVirtual P
 rogram: Presented In-Person
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