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BEGIN:VEVENT
DTSTAMP:20211208T164408Z
LOCATION:DAC Pavilion
DTSTART;TZID=America/Los_Angeles:20211207T163000
DTEND;TZID=America/Los_Angeles:20211207T173000
UID:dac_DAC 2021_sess261_DESPOST151@linklings.com
SUMMARY:Hybrid Emulation Methodology for SSD Design
DESCRIPTION:Designer, IP and Embedded Systems Track Presentations\n\nHybri
 d Emulation Methodology for SSD Design\n\nLee\n\nAs SSD design gets more c
 omplicated, faster simulation for HW/FW co-verification is heavily require
 d to improve time-to-market. Hybrid emulation is a viable solution to achi
 eve the requirement by combining a virtual platform with an emulator. In t
 his work, we propose a hybrid emulation methodology considering the charac
 teristics of SSD design which is application-specific and data-intensive. 
 For SSD design, heavy communication between virtual platform and emulator 
 has a negative impact on the performance of hybrid emulation. To minimize 
 the communication overhead, the three-step partitioning method is newly pr
 oposed. The proposed method improves 12X SSD device initialization time co
 mpared to pure emulation.\n\nVirtual Program: Presented In-Person
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