Session
Learn to Design better NoC
Event TypeResearch Manuscript
Hosted in Virtual Platform
In-Package and On-Chip Communication and Networks-on-Chip
EDA
Time
Location
DescriptionMachine Learning (ML) plays an enabling role in NoC/NoI architecture design and optimization. The papers in this session highlight various opportunities to demonstrate the interplay between ML and manycore architectures. In fact, they focus on two broad classes: one is ML-enabled architecture design and the other is NoC architecture for ML accelerator.