Session
Reinforced: Analog Circuit Sizing and Layout
Event TypeResearch Manuscript
Hosted in Virtual Platform
Analog Design, Simulation, Verification and Test
EDA
Time
Location
DescriptionThis session starts with four inspiring papers to boost the analog and mixed-signal circuit sizing and optimization process with various flavors of reinforcement learning and Bayesian optimization, as for instance using deep neural network, localized and trust-based modeling and exploration, and exploiting design knowledge. The last two papers present exciting ideas on unsupervised symmetry constraint extraction and interactive analog layout editing with legalization.


