Session
Designer, IP and Embedded Systems Track Presentations: Innovative Solutions for Simulation and Registers
Event TypeDesigner, IP and Embedded Systems Track Presentations
Virtual Programs
Hosted in Virtual Platform
Topics
Front-End Design
Location
DescriptionIn this session, you will learn a variety of innovative automation techniques for test/debug, verification and validation of SoC designs.
Presentations
Machine Learning Based Efficient Regression Test Framework in SOC Verification | Hosted in Virtual Platform | ![]() ![]() | |
DIMM Level Verification Methodology for DRAM Custom DFT | Hosted in Virtual Platform | ![]() ![]() | |
Get more out of your UVM register Layer! | Hosted in Virtual Platform | ![]() ![]() | |
Unified FW/ASIC Co-Simulation for Earlier and Accelerated Pre-Silicon Testing | Hosted in Virtual Platform | ![]() ![]() | |
Novel end to end Non-coherent access mechanism on X86 SOC | Hosted in Virtual Platform | ![]() ![]() |