Session
Designer, IP and Embedded Systems Track Presentations: Solving Power Challenges at the Front End
Event TypeDesigner, IP and Embedded Systems Track Presentations
Virtual Programs
Hosted in Virtual Platform
Topics
Front-End Design
Location
DescriptionThis session covers various low power design techniques and power reduction methodologies to achieve most optimal power budgets. In this session, audience will learn about recent innovations in low power domain related to coverage mechanism, workload management and advancement in the field of power and performance.
Presentations
Scoring Vectors for IR Sign-off Using Power-Weighted Coverage Metrics | Hosted in Virtual Platform | ![]() ![]() | |
Designing IP To Achieve Optimal Low Power Using Protocol Defined Low Power States | Hosted in Virtual Platform | ![]() ![]() | |
Power Minimization for peak power and improved GPU sustainability | Hosted in Virtual Platform | ![]() ![]() | |
Power Minimization of MCM/2.5D Chip-2-Chip communication interface Presenter(s) | Hosted in Virtual Platform | ![]() ![]() | |
WOW: Approximate WOrkload Watcher | Hosted in Virtual Platform | ![]() ![]() | |
A comprehensive UPF coverage methodology to avoid late Si Issues Presenter(s) | Hosted in Virtual Platform | ![]() ![]() |