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Research Manuscript: Reinforced: Analog Circuit Sizing and Layout
Session Chair
Event TypeResearch Manuscript
Virtual Programs
Presented In-Person
Keywords
Analog Design, Simulation, Verification and Test
Topics
EDA
TimeThursday, December 9th3:30pm - 5:00pm PST
Location3014
DescriptionThis session starts with four inspiring papers to boost the analog and mixed-signal circuit sizing and optimization process with various flavors of reinforcement learning and Bayesian optimization, as for instance using deep neural network, localized and trust-based modeling and exploration, and exploiting design knowledge. The last two papers present exciting ideas on unsupervised symmetry constraint extraction and interactive analog layout editing with legalization.