Session

DescriptionReconfigurability has become essential, for efficient processing at all layers of the compute stack. This session presents novel architectures for integrating thousands of cores on a single wafer, as well as interconnect technologies for 3D integration. Moreover, architectures for emerging AI paradigms such as hyper-dimensional computing and graph neural networks are presented. Finally, ultra-fast reconfiguration techniques for CGRAs and for virtualizing FPGAs are discussed.