Special Session (Research Track): Accelerating EDA Algorithms with GPUs and Machine Learning
Event TypeSpecial Session (Research Track)
Virtual Programs
Hosted in Virtual Platform
Presented In-Person
Machine Learning/AI
TimeThursday, December 9th10:30am - 12:00pm PST
DescriptionRecent advancements in GPU accelerated computing platforms and machine learning (ML) based optimization techniques have led to exciting recent research progress with large speedups on many EDA algorithms fundamental to semiconductor design flows. In this session, we highlight ongoing research deploying GPUs and ML to mask synthesis, IC design automation, and PCB design at commercial EDA vendors and semiconductor design and manufacturing companies. Research into mask synthesis techniques shows the potential for GPUs to accelerate inverse lithography and for running training and inference of ML models for process modeling. In PCB layout editing, GPU-accelerated path rendering techniques can scale to millions of rendered objects with interactive responsiveness. In IC physical design, GPU-accelerated reinforcement learning for DRC fixing combined with traditional EDA optimization techniques can automate standard cell layout generation. The combination of GPUs and ML can enable large speedups and automate key EDA tasks previously seen as intractable.
10:30am - 11:00am PSTMask Synthesis in the Era of GPU Computing and Deep Learning
Session Organizers
Hosted in Virtual Platform
11:00am - 11:30am PSTAccelerating PCB Layout Editor using modern GPU architecture for complex designs
Session Organizers
Hosted in Virtual Platform